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Cadence Design Systems, Inc. offers functional verification, logical equivalence checking, and formal verification solutions, as well as tools for emulation, prototyping, field programmable gate arrays, power management design, low power design and analysis, physical verification and signoff, analysis-driven debugging and side channel security defect detection. Cadence Design Systems also provides simulation and debugging products to facilitate hardware and software co-development of embedded computer systems, system level verification solutions that enable SoC verification prior to implementation, a family of emulation platforms with the capacity and performance of large ASICs and the ability to emulate a portion or all of an ASIC and scale to millions of gates. Cadence Design Systems, Inc. was incorporated in 1987 and is headquartered in San Jose, California.

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