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Cadence Design Systems (CDNS) investor relations material
Cadence Design Systems Q3 2025 earnings summary
Complete event summary combining all related documents: earnings call transcript, report, and slide presentation.Q3 2025 earnings summary27 Oct, 2025
Executive summary
Delivered strong Q3 2025 results with revenue of $1.339 billion, exceeding guidance and up from $1.215 billion in Q3 2024, with record $7 billion backlog and broad-based momentum across all product categories and geographies.
Raised full-year 2025 outlook to approximately 14% revenue growth and 18% EPS growth, citing accelerating AI-driven design activity and increased non-GAAP EPS guidance midpoint to $7.05.
Expanded partnerships with Samsung, TSMC, and leading semiconductor companies, and completed the acquisition of Arm Artisan foundation IP.
Announced agreement to acquire Hexagon's D&E business, including MSC software, to strengthen structural analysis and multi-body dynamics capabilities.
Hardware segment achieved record Q3, driven by AI and HPC customer expansions.
Financial highlights
Q3 2025 revenue was $1.339 billion, with GAAP operating margin at 31.8% and non-GAAP at 47.6%.
GAAP EPS was $1.05; non-GAAP EPS was $1.93.
Operating cash flow was $311 million; cash balance at quarter end was $2.75 billion; principal value of debt was $2.5 billion.
Gross margin for Q3 2025 was 86.4% GAAP and 88.0% non-GAAP.
Used $200 million to repurchase shares in Q3.
Outlook and guidance
Q4 2025 revenue expected in the range of $1.405 billion-$1.435 billion; GAAP EPS expected at $1.17-$1.23; non-GAAP EPS at $1.88-$1.94.
Full-year 2025 revenue outlook raised to $5.262 billion-$5.292 billion; GAAP EPS expected at $3.80-$3.86; non-GAAP EPS at $7.02-$7.08.
Full-year GAAP operating margin expected at 27.9%-28.9%; non-GAAP at 43.9%-44.9%.
Operating cash flow for 2025 expected at $1.65 billion-$1.75 billion; at least 50% of annual free cash flow to be used for share repurchases.
Explain Q3 China revenue growth drivers
Synergies from recent IP and D&E acquisitions?
DOJ/BIS settlement impact on China business?
Drivers and sustainability of IP business growth?
SDA strategy and Hexagon acquisition impact?
Hardware platform demand and future growth?
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Next Cadence Design Systems earnings date
Q4 20259 Feb, 2026
Next Cadence Design Systems earnings date
Q4 20259 Feb, 2026
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Frequently asked questions
Cadence Design Systems, Inc. offers functional verification, logical equivalence checking, and formal verification solutions, as well as tools for emulation, prototyping, field programmable gate arrays, power management design, low power design and analysis, physical verification and signoff, analysis-driven debugging and side channel security defect detection. Cadence Design Systems also provides simulation and debugging products to facilitate hardware and software co-development of embedded computer systems, system level verification solutions that enable SoC verification prior to implementation, a family of emulation platforms with the capacity and performance of large ASICs and the ability to emulate a portion or all of an ASIC and scale to millions of gates. Cadence Design Systems, Inc. was incorporated in 1987 and is headquartered in San Jose, California.
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